1. Field of Invention
This invention relates to an image sensor, and more particularly to a structure of a complementary metal-oxide-semiconductor (CMOS) image sensor (CIS).
2. Description of Related Art
A CIS process is compatible with a CMOS process, so that CIS can be easily integrated with peripheral circuits on a single chip to lower the production cost and power consumption. Hence, CIS has recently replaced CCD in low-end applications and gets more and more important.
A CIS typically includes a photodiode and several transistors, wherein the photo-diode includes a PN junction formed by a P-substrate and an N-doped region therein, and the transistors are NMOS transistors. Current CIS structures can be classified into 3T-type (three-transistor) structures and 4T-type (four-transistor) structures.
A typical 3T-type structure includes a reset transistor, a source follower transistor, a select transistor and a photodiode. Such a structure causes high dark current, so that the noise is increased lowering the quality of the recorded image. Therefore, 4T-type structures are used more widely.
FIG. 1 schematically depicts a conventional 4T-type CMOS image sensor, which is based on a substrate 100 and includes a transfer transistor 102, a reset transistor 104, a source follower transistor 106, a select transistor 108, a PN-junction photodiode 110, a floating node 112 and a P-well 114. A 4T-type CIS structure causes lower dark current for including a transfer transistor 102.
In a 4T-type CIS structure, the floating node 112 is usually coupled to the gate of the source follower transistor 106 via a contact plug. However, since the floating node 112 is a heavily N-doped region, certain leakage occurs at the PN-junction between the floating node 112 and the P-well 114 lowering the image quality. The current leakage even gets larger as the temperature is raised.